AXI4-Stream Video Interface - 1.2 English

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)

Document ID
PG351
Release Date
2023-10-31
Version
1.2 English

The following table shows the signals for the AXI4-Stream video interface, which supports 4 and 8 pixels per clock with 8 bits, 10 bits, 12 bits, and 16 bits per component for RGB, YUV444, and YUV420 color spaces. The color depth in YUV422 color space is always 12-bits per pixel. This interface is an AXI4-Stream master interface and runs at the s_axis_video_aclk clock rate. The data width is user-configurable in the Vivado IDE by setting Max Bits Per Component (BPC).

Table 1. AXI4-Stream Video Interface
Name I/O Width Description
s_axis_video_aclk I 1 AXI4-Stream clock
s_axis_video_aresetn I 1 Reset (Active-Low)
VIDEO_OUT_tdata O (int((3*BPC*PPC+7)/8))*8 Data
VIDEO_OUT_tlast O 1 End of line
VIDEO_OUT_tready I 1 Ready
VIDEO_OUT_tuser O 1 Start of frame
VIDEO_OUT_tvalid O 1 Valid
  1. PPC = 4 or 8 as only 4 or 8 pixels per component is supported by the HDMI 2.1 RX Subsystem.