HDMI Link Input Interface - 1.2 English

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)

Document ID
PG351
Release Date
2023-10-31
Version
1.2 English

The following table shows the HDMI Link interface signals. This interface runs at the link_clk clock rate.

Table 1. HDMI Link Interface
Name I/O Width Description
link_clk I 1 Link clock
LINK_DATA0_IN_tdata I 40 Link data 0
LINK_DATA0_IN_tvalid I 1 Link Data 0 Valid
LINK_DATA1_IN_tdata I 40 Link data 1
LINK_DATA1_IN_tvalid I 1 Link Data 1 Valid
LINK_DATA2_IN_tdata I 40 Link data 2
LINK_DATA2_IN_tvalid I 1 Link Data 2 Valid
LINK_DATA3_IN_tdata I 40 Link data 3
LINK_DATA3_IN_tvalid I 1 Link Data 3 Valid