Interrupts - 1.2 English

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)

Document ID
PG351
Release Date
2023-10-31
Version
1.2 English
  • HDMI 2.1 Receiver
  • HDCP 1.4 IP
  • HDCP 1.4 Timer
  • HDCP 2.3 IP

The HDMI 2.1 RX Subsystem IP has multiple interrupts sources:

  • Hardware I/O inputs (for example, HPD, SB_STATUS, bridge FIFO overflow/underflow)
  • Auxiliary packets, interrupts
  • Internal timer (for example, VTD timer FRL timer)

All interrupts generated by the HDMI 2.1 RX Subsystem are listed here:

  1. HPD – Peripheral I/O to assert HDMI cable 5.0V signal
    1. Rising edge – Cable connected
    2. Falling edge – Cable disconnected
  2. Link Ready – Every time the PHY Controller is reconfigured, the link_clk is regenerated. An HDMI RX sub-core register bit (link status bit) reflects the change of link_clk status. When stable link_clk is detected, it is set to 1. When link_clk becomes unstable, it is set to 0. The Link Ready is an interrupt to detect the change of the link status bit.
    1. Rising edge – Link is up
    2. Falling edge – Link is down
  3. Video Ready – This interrupt is generated by the HDMI RX sub-core to reflect the status of the received video stream.
    1. Rising edge – Video Stream is stable (StreamUp)
    2. Falling edge – Video Stream is not stable (StreamDown)
  4. HDMI Receiver Auxiliary Infoframe Interrupt – This interrupt is generated when an Auxiliary Infoframe is received.
  5. HDMI Receiver Audio Infoframe Interrupt – This interrupt is generated when an Audio Infoframe is received.
  6. HDCP1.4 Interrupt (only available when HDCP 1.4 is enabled in hardware)
  7. HDCP 1.4 Timer Interrupt (only available when HDCP 1.4 is enabled in hardware)
  8. FRL Interrupts

    All FRL interrupts are triggered by the internal FRL timer interrupt. Then based on software state machines and status, interrupts are triggered accordingly.

    1. FRL Config interrupt
    2. FRL Start interrupt
    3. TMDS Config interrupt
  9. VFP change – This interrupt is generated by the HDMI 2.1 RX Subsystem subcore when video timing data is changed and the VTEM packet is present.
    1. Rising edge – Video timing is changed
  10. VTEM change – This interrupt is generated by the HDMI 2.1 RX Subsystem sub-core when the VTEM packet content is changed.
    1. Rising edge – VTEM packet content is changed.
  11. MTW Event – This interrupt is triggered at end of MTW window, when the Dynamic HDR info frame is present in the stream.
    1. Rising edge – Dynamic HDR info frame received.