Due to a mismatch between the ZCU102/ZCU106 FMC-HPC0 and
the GT Bank, the GT channel must be swapped accordingly during the post optimize design
of implementation stage, by overwriting the constraint for the ZCU102/ZCU106.
| GT Channel | GT LOC |
|---|---|
| 0 | GTHE4_CHANNEL_X0Y14 |
| 1 | GTHE4_CHANNEL_X0Y13 |
| 2 | GTHE4_CHANNEL_X0Y15 |
| 3 | GTHE4_CHANNEL_X0Y12 |
- Use the following code to replace the constraint for the
ZCU102/ZCU106:
# Reset the LOC property to remove the previous LOC reset_property LOC [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST}] reset_property LOC [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[1].GTHE4_CHANNEL_PRIM_INST}] reset_property LOC [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[2].GTHE4_CHANNEL_PRIM_INST}] reset_property LOC [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[3].GTHE4_CHANNEL_PRIM_INST}] # Assign new LOC property according to ZCU106 HPC0 wiring set_property LOC GTHE4_CHANNEL_X0Y14 [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[0].GTHE4_CHANNEL_PRIM_INST}] set_property LOC GTHE4_CHANNEL_X0Y13 [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[1].GTHE4_CHANNEL_PRIM_INST}] set_property LOC GTHE4_CHANNEL_X0Y15 [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[2].GTHE4_CHANNEL_PRIM_INST}] set_property LOC GTHE4_CHANNEL_X0Y12 [get_cells -hierarchical -filter {NAME =~ *gen_channel_container[3].*gen_gthe4_channel_inst[3].GTHE4_CHANNEL_PRIM_INST}]