ATG Debug First Error Bit/First Error Address/Sticky Error Bit - 1.0 English

When vio_tg_err_chk_en is set to 1, ATG stops after the first error. When vio_tg_err_chk_en is set to 0, ATG does not stop after the first error and would track error continuously using vio_tg_status_err_bit_valid/vio_tg_status_err_bit/vio_tg_status_err_addr.

The signals vio_tg_status_err_bit_sticky_valid/vio_tg_status_err_bit_sticky accumulate all data bit(s) with error(s) seen.

Example 2: The following VIO setting powers off Read/Write Error Type check:

.vio_tg_err_chk_en                  (1'b0), // Powers on Error Type Check
.vio_tg_direct_instr_en             (1'b1), // Powers on Direct Instruction Mode
.vio_tg_instr_num                   (5'b00000),
.vio_tg_instr_addr_mode             (TG_PATTERN_MODE_LINEAR),
.vio_tg_instr_data_mode             (TG_PATTERN_MODE_PRBS),
.vio_tg_instr_rw_mode               (TG_RW_MODE_WRITE_READ),
.vio_tg_instr_rw_submode            (2'b00),
.vio_tg_instr_victim_mode           (TG_VICTIM_MODE_NO_VICTIM),
.vio_tg_instr_victim_select         (3'b000),
.vio_tg_instr_victim_aggr_delay     (5'd0),
.vio_tg_instr_num_of_iter           (32'd1000),
.vio_tg_instr_m_nops_btw_n_burst_m  (10'd0),
.vio_tg_instr_m_nops_btw_n_burst_n  (32'd10),
.vio_tg_instr_nxt_instr             (6’d0),

The following figure shows six addresses with read error (note that this is the same example as was used with “Write Error” earlier. “Write Error” is not presented because vio_tg_err_chk_en is disabled here): vio_tg_status_err_bit_valid is asserted six times.

For each assertion, the corresponding bit error is presented at vio_tg_status_err_bit. After five assertions in vio_tg_status_err_bit_valid (yellow marker), vio_tg_status_err_bit_sticky shows bits 0x1E (binary 11110) has bit corruption.