The following table lists the AXI4 slave interface parameters.
| Parameter Name | Allowable Values | Description |
|---|---|---|
| C_S_AXI_ADDR_WIDTH | DDR4: 27–37 | This is the width of address read and address write signals. It
depends on memory density and the configuration selected. It is
calculated as: For DDR4: log2(RANKS) + ROW_WIDTH + COL_WIDTH + BANK_WIDTH + BANK_GROUP_WIDTH + log2(PAYLOAD_WIDTH) - 3 PAYLOAD_WIDTH: This is the data width of the external memory interface which is limited to 8, 16, 32, or 64 for AXI designs. |
| C_S_AXI_DATA_WIDTH | 32, 64, 128, 256, 512 | This is the width of data signals. Width of APP_DATA_WIDTH is recommended for better performance. Using a smaller width invokes an Upsizer, which would spend clocks in packing the data. |
| C_S_AXI_ID_WIDTH | 1–16 | This is the width of ID signals for every channel. |
| C_S_AXI_SUPPORTS_NARROW_ BURST | 0, 1 | This parameter is only applicable when the C_S_AXI_DATA_WIDTH is
equal to APP_DATA_WIDTH. When C_S_AXI_DATA_WIDTH is equal to APP_DATA_WIDTH and this parameter is enabled, the AXI slave instantiates an upsizer. When Master sends AXI Narrow transfers (a transfer that is narrower than its data bus), the upsizer packs consecutive transfers to present a single request at the User Interface. Hence if this AXI slave can receive Narrow transfers, the parameter C_S_AXI_SUPPORTS_NARROW_BURST must be enabled. If not, it results in unexpected behavior when the Slave receives Narrow transfers. When C_S_AXI_DATA_WIDTH is equal to APP_DATA_WIDTH and it is known that the AXI slave never received Narrow transfers, you can disable this parameter to avoid the instantiation of upsizer, thus saving implementation area. In this case, ensure that during actual simulation the AXI Slave never receives Narrow transfers. When C_S_AXI_DATA_WIDTH is less than APP_DATA_WIDTH, upsizer is always instantiated and this parameter has no effect. |
| C_RD_WR_ARB_ALGORITHM | TDM, ROUND_ROBIN, RD_PRI_REG, RD_PRI_REG_STARVE_LIMIT, WRITE_PRIORITY_REG, WRITE_PRIORITY | This parameter indicates the Arbitration algorithm scheme. See the Arbitration in AXI Shim section for more information. |
| C_ECC | ON, OFF | This parameter specifies if ECC is enabled for the design or not. ECC is always enabled for 72-bit designs and disabled for all other data widths |