Advanced Traffic Generator - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

In the example design created by Vivado, the ATG is set to default setting which is described in the next section. The default setting is recommended for most to get started. The ATG could be programmed differently to test memory interface with different traffic patterns. For further information on ATG programming, see the Traffic Generator Description section.

After memory initialization and calibration are done, the ATG starts sending write commands and read commands. If the memory read data does not match with the expected read data, the ATG flags compare errors through the status interface.