CAL_ERROR Decode for Read DQS to DQ/DBI Centering Complex Calibration

CAL_ERROR Decode for Read DQS to DQ/DBI Centering Complex Calibration - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID

PG353

Release Date

2023-10-18

Version

1.0 English

The status of Read DQS to DQ/DBI Centering Complex can also be determined by decoding the CAL_ERROR result according to the table below. Execute the Tcl commands noted in the Manually Analyzing the XSDB Output section to generate the XSDB output containing the signal results

Table 1. CAL_ERROR Decode for Read DQS to DQ/DBI Centering Complex Calibration
Error Code	Description	Recommended Debug Step
49	Noise region not found for a given bit in the nibble by incrementing DQ IDELAY	Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
50	Could not find the left edge of valid data window by incrementing PQTR/NQTR IDELAY together (short complex burst)	Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
51	Could not find the left edge of valid data window by incrementing PQTR/NQTR IDELAY together (long complex burst)	Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
52	Could not find the right edge of valid data window by decrementing PQTR/NQTR IDELAY together (short complex burst)	Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
53	Could not find the right edge of valid data window by decrementing PQTR/NQTR IDELAY together (long complex burst)	Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
54	Positive sanity check failed	Check CAL_ERROR_BIT__, CAL_ERROR_DATA_NIBBLE__, CAL_ERROR_PHY_NIBBLE__ XSDB registers to determine which nibbles/bits failed. Check margin found during previous stages of calibration for the given byte that failed.