CAL_ERROR Decode for Write DQS to DQ/DBI Centering Complex - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

The status of Write DQS to DQ/DBI Centering Complex can also be determined by decoding the CAL_ERROR result according to the table below. Execute the Tcl commands noted in the Manually Analyzing the XSDB Output section to generate the XSDB output containing the signal results.

Table 1. CAL_ERROR Decode for Write DQS to DQ/DBI Centering Complex
Error Code Description Recommended Debug Step
55 Could not find the left edge of valid data window by incrementing DQ and DBI ODELAY (if enabled) together using step size of 10 taps. Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
56 Could not find the left edge of valid data window by incrementing DQ and DBI ODELAY (if enabled) together using step size of 1 tap.

Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.

57 Could not find the right edge of valid data window by incrementing DQS ODELAY using step size of 10 taps. Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
58 Could not find the right edge of valid data window by incrementing DQS ODELAY using step size of 1 tap. Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
59 Positive sanity check failed. Check CAL_ERROR_BIT_*_*, CAL_ERROR_DATA_NIBBLE_*_*, CAL_ERROR_PHY_NIBBLE_*_* XSDB registers to determine which nibbles/bits failed. Check margin found during previous stages of calibration for the given byte that failed.
60 Could not find the right edge of valid data window by decrementing DQ ODELAY using step size of 10 taps. Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
61 Could not find the right edge of valid data window by decrementing DQ ODELAY using step size of 1 taps. Check for a mapping issue. This usually implies a delay is not moving when it should. Check the connections going to the XPHY and ensure the correct RIU is selected based on the byte being adjusted.
62 Positive sanity check 1 failed. Check CAL_ERROR_BIT_*_*, CAL_ERROR_DATA_NIBBLE_*_*, CAL_ERROR_PHY_NIBBLE_*_* XSDB registers to determine which nibbles/bits failed. Check margin found during previous stages of calibration for the given byte that failed.
63 Write complex read DQS oscillator value to be 0.  
64 Write complex computed tDQS2DQ value to be out of range.