Each calibration stage has its own set of error scenarios. Each of the error scenario is encoded in CAL_ERROR with different values. This location is only valid when the current calibration stage has failed.
| Calibration Stage | Error Code | Description |
|---|---|---|
| DQS Gate Calibration | 1 | Ran out coarse taps in the present sub-stage |
| 2 | Ran out fine taps in the present sub-stage | |
| 3 | Reached offset to 1 in third edge detect phase | |
| 4 | Reached read latency limit in the preset sub-stage | |
| 5 | Unable to find common read latency across all ranks because of unexpected read latency difference | |
| Write Latency Calibration | 1 | No pattern match |
| 2 | Sanity check failed | |
| Write Leveling | 1 | Could not find the 0x1 edge |
| 2 | Ran out of offset value, while finding the stable 0 value | |
| 3 | Ran out of offset value, while finding the noise | |
| Write DQ Per-bit Deskew and Centering | 1 | DQS delay crossing 90° offset |
| 2 | DQ delay crossing 180° offset during valid to noise | |
| 3 | DQ delay crossing 180° offset during left edge of noise | |
| 4 | Sanity check failure | |
| Read DQ Per-bit Deskew and Centering | 1 | Ran out of fine taps in the present sub-stage |
| 2 | Sanity check failed |