Calibration Physical Nibble (CAL_PHY_NIBBLE) - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

This location lists the physical nibbles which have failed in the current calibration stage. Each bit corresponds to a physical nibble. Total number of valid bits is based on the number of physical nibbles in the interface. Bit 0 corresponds to physical nibble 0, Bit 1 corresponds to physical nibble 1, etc. This location is only valid when the current calibration stage has failed. Maximum possible physical nibbles are 27 (three banks with nine nibbles per bank).