Calibration Stages - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

The following figure shows the overall flow of memory initialization and the different stages of calibration. The dark gray color is not available for this release.

Figure 1. PHY Overall Initialization and Calibration Sequence