The following table shows the DDR4 cal_post_status
signal.
Debug Signal | Bit | Description | Post-Calibration Step |
---|---|---|---|
cal_post_status | 0 | Running | DQS Gate Tracking |
1 | Idle | ||
2 | Fail | ||
3 | Running | Read Margin Check (Reserved) | |
4 | Running | Write Margin Check (Reserved) | |
5 | Handshake Failure (Reserved) | ||
6 | Margin Check Failure (Reserved) | ||
7 | Reserved | ||
8 | Reserved |