DIMM Configurations - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

DDR4 SDRAM memory interface supports UDIMM, RDIMM, LRDIMM, and SODIMM in multiple slot configurations.

Important: The chip select order generated by Vivado is dependent on your board design. Also, the DDR4 IP core does not read SPD. If the DIMM configuration changes, the IP must be regenerated.

In the following configurations, the empty slot is not used and it is optional to be implemented on the board.