The ECC On/Off Control register allows the application to enable or disable ECC checking. The design parameter, C_ECC_ONOFF_RESET_VALUE (default on) determines the reset value for the enable/disable setting of ECC. This facilitates start-up operations when ECC might or might not be initialized in the external memory. When disabled, ECC checking is disabled for read but ECC generation is active for write operations.
| Bits | Name | Core Access | Reset Value | Description |
|---|---|---|---|---|
| 0 | ECC_ON_OFF | R/W | Specified by design parameter, C_ECC_ONOFF_ RESET_VALUE | If 0, ECC checking is disabled on read
operations. (ECC generation is enabled on write operations when
C_ECC = 1). If 1, ECC checking is enabled on read operations. All correctable and uncorrectable error conditions are captured and status is updated. |