To aid the analysis of ECC errors, there are two banks of storage registers that
collect information on the failing ECC decode. One bank of registers is for correctable
errors, and another bank is for uncorrectable errors. The failing address, undecoded
data, and ECC bits are saved into these register banks as CE_FFA, CE_FFD, and CE_FFE for
correctable errors. UE_FFA, UE_FFD, and UE_FFE are for uncorrectable errors. The data in
combination with the ECC bits can help determine which bit(s) have failed. CE_FFA stores
the address from the ecc_err_addr signal and converts it to a byte
address. Upon error detection, the data is latched into the appropriate register. Only
the first data beat with an error is stored.
When a correctable error occurs, there is also a counter that counts the number of correctable errors that have occurred. The counter can be read from the CE_CNT register and is fixed as an 8-bit counter. It does not rollover when the maximum value is incremented.