How to Program Traffic Generator Instruction - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

After calibration is completed, the ATG starts sending current traffic pattern presented at the VIO interface if direct instruction mode is on or default traffic sequence according to the traffic pattern table if the direct instruction mode is off.

If it is desired to run a custom traffic pattern, either program the instruction table before the ATG starts or pause the ATG. Program the instruction table and restart the test traffic through the VIO.

Steps to program the instruction table (wait for at least one general interconnect cycle between each step) are listed here.

Programming instruction table after reset:

  1. Set the vio_tg_start to 0 to stop the ATG before reset deassertion.
  2. Check if the vio_tg_status_state is TG_INSTR_START (hex0). Then go to common steps.

Programming instruction table after traffic started:

  1. Set the vio_tg_start to 0 and set vio_tg_pause to 1 to pause the ATG.
  2. Check and wait until the vio_tg_status_state is TG_INSTR_DONE (hexC), TG_INSTR_PAUSE (hex8), or TG_INSTR_ERRDONE (hex7).
  3. Send a pulse to the vio_tg_restart. Then, go to common steps.

Common steps:

  1. Set the vio_tg_instr_num_instr to the instruction number to be programmed.
  2. Set all of the vio_tg_instr_* registers (instruction register) with desired traffic pattern.
  3. Wait for four general interconnect cycles (optional for relaxing VIO write timing).
  4. Set the vio_tg_instr_program_en to 1. This enables instruction table programming.
  5. Wait for four general interconnect cycles (optional for relaxing VIO write timing).
  6. Set the vio_tg_instr_program_en to 0. This disables instruction table programming.
  7. Wait for four general interconnect cycles (optional for relaxing VIO write timing).
  8. Repeat steps 1 to 7 if more than one instruction is programmed.
  9. Optionally set the vio_tg_glb* registers (global register) if related features are programmed.
  10. Optionally set the vio_tg_err_chk_en if you want the ATG to stop and perform read test in case of mismatch error.
  11. Set the vio_tg_pause to 0 and set vio_tg_start to 1. This starts the ATG with new the programming.