LRDIMM MRD Center Training - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

This training aligns Read MDQS in the center of the Read MDQ window at the data buffer. In this training mode, the controller pre-programs the data buffer MPR registers with the expected pattern and issues the commands. The data buffer compares the read data with the expected data and feeds back the result on the DQ bus. Calibration finds the left and right edges of the Read MDQ valid window and centers Read MDQS in it.

Table 1. MRD Center Training Register
XSDB Reg Usage Signal Description
BRAM_DB_MRD_CENTER_RANK*_NIBBLE* One value per rank per nibble Data Buffer MRD taps [4:0]