Read Path - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

The read data is returned by the user interface in the requested order and is valid when app_rd_data_valid is asserted. The app_rd_data_end signal indicates the end of each read command burst and is not needed in user logic.

Figure 1. 4:1 Mode User Interface Read Timing Diagram (Memory Burst Type = BL8) #1

In the following figure, the read data returned is always in the same order as the requests made on the address/control bus.

Figure 2. 4:1 Mode User Interface Read Timing Diagram (Memory Burst Type = BL8) #2