After calDone is asserted by the PHY, periodic DRAM refresh and
ZQ calibration are the responsibility of your custom Memory Controller. Your controller
must issue refresh and ZQ commands, meet DRAM refresh and ZQ interval requirements,
while meeting all other DRAM protocol and timing requirements. For example, if a refresh
is due and you have open pages in the DRAM, you must precharge the pages, wait tRP, and
then issue a refresh command, etc. The PHY does not perform the precharge or any other
part of this process for you.