Two vectored signals from the Memory Controller indicate an ECC error:
ecc_single and ecc_multiple. The
ecc_single signal indicates if there has been a correctable error
and the ecc_multiple signal indicates if there has been an
uncorrectable error. The widths of ecc_multiple and
ecc_single are based on the C_NCK_PER_CLK parameter.
There can be between 0 and C_NCK_PER_CLK × 2 errors per cycle with each data
beat signaled by one of the vector bits. Multiple bits of the vector can be signaled per
cycle indicating that multiple correctable errors or multiple uncorrectable errors have
been detected. The ecc_err_addr signal (discussed in the Fault
Collection section) is valid during the assertion of either ecc_single
or ecc_multiple.
The ECC_STATUS register sets the CE_STATUS bit and/or UE_STATUS bit for correctable error detection and uncorrectable error detection, respectively.