Traffic Error Detection - 1.0 English

The ATG includes multiple data error reporting features. When using the Traffic Generator Default Behavior, check if there is a memory error in the Status register (vio_tg_status_err_sticky_valid) or if memory traffic stops (vio_tg_status_watch_dog_hang).

After the first memory error is seen, the ATG logs the error address (vio_tg_status_first_err_addr) and bit mismatch (vio_tg_status_first_err_bit).

The VIO signal vio_tg_err_chk_en is used to enable error checking and can report read versus write data errors on vio_tg_status_err_type when vio_tg_status_err_type_valid is High. When using vio_tg_err_chk_en, the ATG can be programmed to have two different behaviors when traffic error is detected.

1. Stop traffic after first error is seen.

   The ATG stops traffic after first error. The ATG then performs a read-check to detect if the mismatch seen is a "WRITE" error or "READ" error. When vio_tg_status_state reaches ERRD one state, the read-check is completed. The vio_tg_restart can be pulsed to clear and restart ATG or the vio_tg_err_continue can be pulsed to continue traffic.

2. Continue traffic with error.

   The ATG continues sending traffic. The traffic can be restarted by asserting pause (vio_tg_pause), followed by pulse restart (vio_tg_restart), then deasserting pause.

In both cases, bitwise sticky bit mismatch is available in VIO for accumulated mismatch.

When a mismatch error is encountered, use the vio_tg_status_err_bit_valid to trigger the Vivado Logic Analyzer. All error status are presented in the vio_tg_status_* registers.

Error status can be cleared when the ATG is in either ERRDone or Pause states. Send a pulse to the vio_tg_clear to clear all error status except sticky bit. Send a pulse to the vio_tg_clear_all to clear all error status including sticky bit.

If vio_tg_err_chk_en is enabled, the ATG performs an error check to categorize whether a “READ” or “WRITE” error is encountered. The ATG categorizes error type using the following mechanism. When an error is first seen, the error is logged in the vio_tg_status_first* status registers. The error address would be read by the ATG for 1,024 times. If all the reads return data differently from the vio_tg_status_first_exp_bit register and all the reads return the same data, the error is categorized as “WRITE” error. Otherwise, the error is categorized as “READ” error.