Write Centering - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID
PG353
Release Date
2023-10-18
Version
1.0 English

In the write DQS centering step, the left and right margins have to be determined. First, increment delay taps of DQ bits and DBI until invalid data is read back. This is recorded as the left margin of the write valid window. To find the right margin, DQS taps are incremented until valid to invalid data transition is found. Finally, DQS is placed at the center of the write valid window based on the left and right margins detected.

At the end of this stage of calibration, a sanity check is performed to ensure correct write and read functionality.