The write latency is allowed to fall wherever it can in multi-rank systems, each rank is allowed to calibrate independently given the algorithms in Write Leveling and Write Latency Calibration. After all ranks have been calibrated and before it finishes, a check is made to ensure certain XPHY requirements are met on the write path. The difference in write latency between the ranks is allowed to be 180° (or two XPHY coarse taps).