XSDB Registers of Interest during Write Per-Bit DBI Deskew Calibration

XSDB Registers of Interest during Write Per-Bit DBI Deskew Calibration - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)

Document ID

PG353

Release Date

2023-10-18

Version

1.0 English

The following table shows the XSDB registers and values adjusted or used during the Write Per-Bit DBI Deskew stage of calibration. The values can be analyzed in both successful and failing calibrations to determine the resultant values and the consistency in results across resets. These values can be found within the Memory IP core properties in the Hardware Manager or by executing the Tcl commands noted in the Manually Analyzing the XSDB Output section.

Table 1. XSDB Registers of Interest during Write Per-Bit DBI Deskew Calibration
XSDB Reg	Usage	Signal Description
BRAM_WRDQDBI_STG4_BYTE_STATUS_*	–	Write valid window detection status.
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE*	One per byte	DQS ODELAY value required to place DQS into the byte write data valid window during write DBI bit deskew.
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE*	One per byte	DQS ODELAY value after reverting DQS to initial value if byte write valid data is not detected.
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE*	One per byte	DBI ODELAY value after detecting write valid window by incrementing DBI ODELAY.
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE*	One per byte	DBI ODELAY value when invalid write data is detected by incrementing ODELAY using step size of 10 taps.
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE*	One per byte	DBI ODELAY value when invalid write data is detected by incrementing ODELAY using step size of 1 tap.

This is a sample of the results for the Write Per-Bit DBI Deskew XSDB debug signals:

BRAM_WRDQDBI_STG4_BYTE_STATUS_00              int     true       255
BRAM_WRDQDBI_STG4_BYTE_STATUS_01              int     true       255
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE0             int     true       31
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE1             int     true       63
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE2             int     true       105
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE3             int     true       93
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE4             int     true       59
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE5             int     true       28
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE6             int     true       55
BRAM_WRDQDBI_STG4_DQS_DELAY_BYTE7             int     true       99
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE0              int     true       45
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE1              int     true       77
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE2              int     true       119
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE3              int     true       107
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE4              int     true       73
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE5              int     true       42
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE6              int     true       69
BRAM_WRDQDBI_STG5_DQS_ODLY_BYTE7              int     true       113
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE0              int     true       31
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE1              int     true       63
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE2              int     true       105
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE3              int     true       93
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE4              int     true       59
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE5              int     true       28
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE6              int     true       55
BRAM_WRDQDBI_STG6_DBI_ODLY_BYTE7              int     true       99
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE0      int     true       101
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE1      int     true       133
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE2      int     true       185
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE3      int     true       173
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE4      int     true       129
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE5      int     true       98
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE6      int     true       135
BRAM_WRDQDBI_DESKEW_DBI_ODLY_FCRSE_BYTE7      int     true       169
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE0            int     true       105
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE1            int     true       137
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE2            int     true       185
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE3            int     true       175
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE4            int     true       137
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE5            int     true       101
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE6            int     true       141
BRAM_WRDQDBI_DESKEW_DBI_ODLY_BYTE7            int     true       171