This input specifies the state of the A10 autoprecharge bit for
the DRAM CAS command for the request currently being submitted to the user interface.
When this input is Low, the Memory Controller issues a DRAM RD or WR CAS command. When
this input is High, the controller issues a DRAM RDA or WRA CAS command. This input
provides per request control, but can also be tied off to configure the controller
statically for open or closed page mode operation. The Memory Controller also has an
option to automatically determine when to issue an AutoPrecharge. This option disables
the app_autoprecharge input. For more information on the automatic
mode, see the Performance section.