Calibration Overview - 1.0 English

Versal ACAP Soft RLDRAM 3 Memory Controller LogiCORE IP Product Guide (PG354)

Document ID
PG354
Release Date
2021-11-03
Version
1.0 English
Note: Only enabled for data rates above 1,600 Mb/s.

The final stage of Complex Write Calibration that is completed before normal operation is repeating the steps performed during Simple Write Calibration but with a difficult complex pattern. The purpose of using a complex pattern is to stress the system for SI effects such as ISI and noise while calculating the write clock DK center and write DQ positions. This ensures the write center position can reliably capture data with margin in a true system.