Calibration Stages - 1.0 English

Versal ACAP Soft RLDRAM 3 Memory Controller LogiCORE IP Product Guide (PG354)

Document ID
PG354
Release Date
2021-11-03
Version
1.0 English

The following figure shows the overall flow of memory initialization and the different calibration stages of RLDRAM 3.

Figure 1. PHY Overall Initialization and Calibration Sequence