The following table shows the relationship between the fields in the Vivado® IDE and the user parameters (which can be viewed in the Tcl Console).
Vivado IDE Parameter/Value | User Parameter/Value | Default Value |
---|---|---|
System Clock Configuration | System_Clock | Differential |
Internal VREF | Internal_Vref | TRUE |
DCI Cascade | DCI_Cascade | FALSE |
Debug Signal for Controller | Debug_Signal | Disable |
Enable System Ports | Enable_SysPorts | TRUE |
Default Bank Selections | Default_Bank_Selections | FALSE |
Reference Clock | Reference_Clock | FALSE |
Enable System Ports | Enable_SysPorts | TRUE |
Clock Period (ps) | C0.RLD3_TimePeriod | 1,071 |
Input Clock Period (ps) | C0.RLD3_InputClockPeriod | 13,947 |
General Interconnect to Memory Clock Ratio | C0.RLD3_PhyClockRatio | 4:1 |
Configuration | C0.RLD3_MemoryType | Components |
Memory Part | C0.RLD3_MemoryPart | MT44K16M36RB-093 |
Data Width | C0.RLD3_DataWidth | 36 |
Data Mask | C0.RLD3_DataMask | TRUE |
Burst Length | C0.RLD3_BurstLength | 8 |
Memory Voltage | C0.RLD3_MemoryVoltage | 1.2 |