M**_AXIS Interface Ports - 2.0 English

AI Engine LogiCORE IP Product Guide (PG358)

Document ID
PG358
Release Date
2021-07-02
Version
2.0 English

The following table shows the M**_AXIS Interface Ports and their descriptions.

Table 1. M**_AXIS Interface Ports
Port Name I/O Description
m**_axis_tid

(C_M**_AXIS_TID_WIDTH – 1:0)

O TID is the data stream identifier that indicates different streams of data.
m**_axis_tdest

(C_M**_AXIS_TDEST_WIDTH – 1:0)

O TDEST provides routing information for the data stream.
m**_axis_tdata

(C_M**_AXIS_TDATA_WIDTH – 1:0)

O TDATA is the primary payload that is used to provide the data that is passing across the interface. The width of the data payload is an integer number of bytes.
m**_axis_tkeep

(C_M**_AXIS_TDATA_WIDTH/ 8 – 1:0)

O TKEEP is the byte qualifier that indicates whether the content of the associated byte of TDATA is processed as part of the data stream. Associated bytes that have the TKEEP byte qualifier deasserted are null bytes and can be removed from the data stream.
m**_axis_tlast O TLAST indicates the boundary of a packet.
m**_axis_tready I TREADY indicates that the slave can accept a transfer in the current cycle.
m**_axis_tvalid O TVALID indicates that the master is driving a valid transfer. A transfer takes place when both TVALID and TREADY are asserted.