Constraining the Core/Subsystem - 2.0 English

AXI4 Debug Hub LogiCORE IP Product Guide (PG361)

Document ID
PG361
Release Date
2020-12-11
Version
2.0 English
Revision

Required Constraints

This section is not applicable for this IP core or subsystem.

Device, Package, and Speed Grade Selections

This section is not applicable for this IP core or subsystem.

Clock Frequencies

This section is not applicable for this IP core or subsystem.

Clock Management

This section is not applicable for this IP core or subsystem.

Clock Placement

This section is not applicable for this IP core or subsystem.

Banking

This section is not applicable for this IP core or subsystem.

Transceiver Placement

This section is not applicable for this IP core or subsystem.

I/O Standard and Placement

This section is not applicable for this IP core or subsystem.