Resets - 2.0 English

AXI4 Debug Hub LogiCORE IP Product Guide (PG361)

Document ID
PG361
Release Date
2020-12-11
Version
2.0 English
Revision

The aresetn input port is used as reset port on the AXI interface by the AXI4 Debug Hub. This is an active-High, synchronous signal and sampled with respect to aclk. The AXI side of logic is reset when the AXI4 Debug Hub samples this as high on the rising edge of aclk.