The BSCAN to JTAG Converter core is designed to bridge Xilinx® BSCAN and JTAG interfaces. The IP converts the signals received from a BSCAN interface into JTAG signals that can drive JTAG transactions. For example, the signals found in BSCAN primitive or Debug Bridge IP. The IP can be used in the Vivado® IP integrator or can be instantiated in HDL in a Vivado project. The IP can also be used in applications that supports JTAG input interface but does not support BSCAN interface.
The following figure shows the block level design of the BSCAN to JTAG Converter core when instantiated in the Vivado IP integrator.
The following figure shows the available ports in BSCAN and JTAG interfaces:
