Frame Receive with Errors - 2.3 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2023-11-08
Version
2.3 English

As with non-channelized frame receive, the DCMAC Subsystem flags a frame as errored by asserting the err signal in the final segment of the frame (with ena and eop both asserted).

The conditions for assertion of the err indicator are the same for channelized segmented AXI4-Stream as they are for the non-channelized mode.