Transceiver Signaling for 400G Operation

Transceiver Signaling for 400G Operation - 2.3 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID

PG369

Release Date

2023-11-08

Version

2.3 English

Note: In this table, fec_rx_din_start_*_bh signals are used only during 400G FlexO mode of operation.

Note: In this table, fec_tx_dout_start_*_bh signals are used only during 400G FlexO mode of operation.

Table 1. 1 x 400G Transceiver Signaling
Port	Interface	Active GT Clocks	Active GT Interface Data Bus
0	RX SerDes IF	rx_serdes_clk[0] rx_alt_serdes_clk[0] rx_serdes_clk[1] rx_alt_serdes_clk[1] rx_serdes_clk[2] rx_alt_serdes_clk[2] rx_serdes_clk[3] rx_alt_serdes_clk[3]	rx_serdes_data0[79:0]
			rx_serdes_data1[79:0]
			rx_serdes_data2[79:0]
			rx_serdes_data3[79:0]
			rx_serdes_data4[79:0]
			rx_serdes_data5[79:0]
			rx_serdes_data6[79:0]
			rx_serdes_data7[79:0]
			rx_serdes_data8[79:0]
			rx_serdes_data9[79:0]
			rx_serdes_data10[79:0]
			rx_serdes_data11[79:0]
			rx_serdes_data12[79:0]
			rx_serdes_data13[79:0]
			rx_serdes_data14[79:0]
			rx_serdes_data15[79:0]
			fec_rx_din_start_0
			fec_rx_din_start_0_bh
			rx_serdes_fifo_flagout_0
			rx_serdes_albuf_restart_0
			rx_serdes_albuf_slip_0
			rx_serdes_albuf_slip_1
			rx_serdes_albuf_slip_2
			rx_serdes_albuf_slip_3
			rx_serdes_albuf_slip_4
			rx_serdes_albuf_slip_5
			rx_serdes_albuf_slip_6
			rx_serdes_albuf_slip_7
			rx_serdes_albuf_slip_8
			rx_serdes_albuf_slip_9
			rx_serdes_albuf_slip_10
			rx_serdes_albuf_slip_11
			rx_serdes_albuf_slip_12
			rx_serdes_albuf_slip_13
			rx_serdes_albuf_slip_14
			rx_serdes_albuf_slip_15
0	TX SerDes IF	tx_serdes_clk[0] tx_alt_serdes_clk[0] tx_serdes_clk[1] tx_alt_serdes_clk[1] tx_serdes_clk[2] tx_alt_serdes_clk[2] tx_serdes_clk[3] tx_alt_serdes_clk[3]	tx_serdes_data0[79:0]
			tx_serdes_data1[79:0]
			tx_serdes_data2[79:0]
			tx_serdes_data3[79:0]
			tx_serdes_data4[79:0]
			tx_serdes_data5[79:0]
			tx_serdes_data6[79:0]
			tx_serdes_data7[79:0]
			tx_serdes_data8[79:0]
			tx_serdes_data9[79:0]
			tx_serdes_data10[79:0]
			tx_serdes_data11[79:0]
			tx_serdes_data12[79:0]
			tx_serdes_data13[79:0]
			tx_serdes_data14[79:0]
			tx_serdes_data15[79:0]
			fec_tx_dout_start_0
			fec_tx_dout_start_0_bh
			tx_serdes_is_am_prefifo_0
			tx_serdes_is_am_0