Packet Mode - 1.3 English

Versal Adaptive SoC Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)

Document ID
PG371
Release Date
2024-01-09
Version
1.3 English

Packet Mode occurs when a packet with a certain channel number is transferred in its entirety across the TX AXI4-Stream bus without interruption by a packet belonging to a different channel. The SOP data is transferred on a segment when the corresponding tx_axis_tuser_sop<M> is asserted. The final data belonging to the packet is transferred on a segment when the corresponding tx_axis_tuser_eop<M> is asserted.