Revision History - 1.3 English

Versal Adaptive SoC Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)

Document ID
PG371
Release Date
2024-01-09
Version
1.3 English

The following table shows the revision history for this document.

Section Revision Summary
01/09/2024 Version 1.3
Customizing and Generating the Subsystem Added note about configurations supported by GTYP.
Transmit AXI4-Stream Interface Minor corrections.
Receive AXI4-Stream Interface Minor corrections.
Segment Ordering Minor corrections.
08/30/2023 Version 1.3
General updates Editorial updates in the document.
08/11/2023 Version 1.3
FEC-Only Example Design New section added.
Customizing and Generating the Subsystem Updated the section.
User Parameters Updated the section.
Document title Changed title to Versal Adaptive SoC Integrated 600G Interlaken with FEC Subsystem v1.3.
01/19/2023 Version 1.2
General Updates Updated all instances of 112.84 Gb/s to 112.0 Gb/s as the highest supported GTM lane rate across all speed-grades (unless an SCD is created) is 112.0 Gb/s.
Subsystem Overview Updated Table 1.
Configuration Tab and GT Information Tab Updated screenshots for Configuration Tab and GT Information Tab.
07/21/2022 Version 1.1
Initial release N/A