Decryption Egress AXI4-Stream - 1.0 English

The AXI4-Stream egress interface for decryption path follows the same rules as the AXI4-Stream egress interface for encryption path in both Fixed Port and Channelized modes.

In Channelized mode, if an overflow occurs for a given channel, the HSC Subsystem asserts stat_rsvd_out_rx_top[65] during an active cycle on decryption egress to indicate the overflow. Note that similar to other egress signals, stat_rsvd_out_rx_top[65] is aligned with dec_egr_axis_tid[5:0].

In 400G Channelized Mode (or 1x400G Fixed Mode), there can be four idle segments in the middle of a packet on either the lower half (segments 0 to 3) or upper half (segments 4 to 7) of the decryption egress AXI4-Stream data bus.