Encryption Egress Per-Port Interface Signal Descriptions - 1.0 English

Versal Adaptive SoC Integrated 400G High Speed Channelized Cryptography Engine Subsystem Product Guide (PG372)

Document ID
PG372
Release Date
2024-01-30
Version
1.0 English
Table 1. Encryption Egress Per-Port Interface Signal Descriptions
Port Name Clock Domain I/O Description
enc_egr_prtif_crypto_auth_only_p0 enc_egr_axis_clk O PortIF Egress Encryption Authenticate Only: This is the authentication-only indication signal for the non-bypass packet which starts on segment 0 or 1. When it is set to 1, it indicates that the encryption core only performed the authentication function on the packet. When this signal is not set, both encryption and authentication are performed. This output is only valid during the start of packet for non-bypass packets and its value should be ignored for bypass packets. This signal is valid for MACsec, IPsec, and BulkCrypto modes.
enc_egr_prtif_crypto_auth_only_p1 enc_egr_axis_clk O PortIF Egress Encryption Authenticate Only: This is the authentication-only indication signal for the non-bypass packet which starts on segment 2 or 3. See description for enc_egr_prtif_crypto_auth_only_p0 for more details.
enc_egr_prtif_crypto_auth_only_p2 enc_egr_axis_clk O PortIF Egress Encryption Authenticate Only: This is the authentication-only indication signal for the non-bypass packet which starts on segment 4 or 5. See description for enc_egr_prtif_crypto_auth_only_p0 for more details.
enc_egr_prtif_crypto_auth_only_p3 enc_egr_axis_clk O PortIF Egress Encryption Authenticate Only: This is the authentication-only indication signal for the non-bypass packet which starts on segment 6 or 7. See description for enc_egr_prtif_crypto_auth_only_p0 for more details.
enc_egr_prtif_crypto_byp_p0 enc_egr_axis_clk O PortIF Egress Encryption Bypass Indication: This is the bypass indication signal for the packet which starts on segment 0 or 1. When this signal is asserted, it indicates that the packet has bypassed the encryption and authentication functions and passed through the encryption core unchanged. This signal is only valid during the start of packet. This signal is valid for all crypto modes.
enc_egr_prtif_crypto_byp_p1 enc_egr_axis_clk O PortIF Egress Encryption Bypass Indication: This is the bypass indication signal for the packet which starts on segment 2 or 3. See description forenc_egr_prtif_crypto_byp_p0 for more details.
enc_egr_prtif_crypto_byp_p2 enc_egr_axis_clk O PortIF Egress Encryption Bypass Indication: This is the bypass indication signal for the packet which starts on segment 4 or 5. See description for enc_egr_prtif_crypto_byp_p0 for more details.
enc_egr_prtif_crypto_byp_p3 enc_egr_axis_clk O PortIF Egress Encryption Bypass Indication: This is the bypass indication signal for the packet which starts on segment 6 or 7. See description for enc_egr_prtif_crypto_byp_p0 for more details.
enc_egr_prtif_crypto_icv_p0[127:0] enc_egr_axis_clk O PortIF Egress Encryption ICV:

This signal indicates the calculated ICV in BulkCrypto mode for the packet which ends on segment 0 or 1. Byte 0 of the ICV is mapped to bits [127:120] and byte 15 is mapped to bits [7:0] of this signal.

In MACsec and IPsec modes, the 64-bit packet number, which is set for each packet on the encryption ingress interface, is provided on bits [63:0] for the packet that starts on segment 0 or 1. In BulkECB mode, only bits [31:0] of the ingress packet number is provided on bits [31:0].

enc_egr_prtif_crypto_icv_p1[127:0] enc_egr_axis_clk O PortIF Egress Encryption ICV:

This signal indicates the calculated ICV in BulkCrypto mode for the packet which ends on segment 2 or 3. See description for enc_egr_prtif_crypto_icv_p0 for more details.

enc_egr_prtif_crypto_icv_p2[127:0] enc_egr_axis_clk O PortIF Egress Encryption ICV:

This signal indicates the calculated ICV in BulkCrypto mode for the packet which ends on segment 4 or 5. See description for enc_egr_prtif_crypto_icv_p0 for more details.

enc_egr_prtif_crypto_icv_p3[127:0] enc_egr_axis_clk O PortIF Egress Encryption ICV:

This signal indicates the calculated ICV in BulkCrypto mode for the packet which ends on segment 6 or 7. See description for enc_egr_prtif_crypto_icv_p0 for more details.

enc_egr_prtif_crypto_sa_index_p0[19:0] enc_egr_axis_clk O PortIF Egress Encryption SA Index:

This signal represents the Security Association (SA) Index for the packet that starts on segment 0 or 1. This signal is valid in all crypto modes. This input is only valid during the start of packet.

enc_egr_prtif_crypto_sa_index_p1[19:0] enc_egr_axis_clk O PortIF Egress Encryption SA Index:

This signal represents the Security Association (SA) Index for the packet that starts on segment 2 or 3. This signal is valid in all crypto modes. This input is only valid during the start of packet.

enc_egr_prtif_crypto_sa_index_p2[19:0] enc_egr_axis_clk O PortIF Egress Encryption SA Index:

This signal represents the Security Association (SA) Index for the packet that starts on segment 4 or 5. This signal is valid in all crypto modes. This input is only valid during the start of packet.

enc_egr_prtif_crypto_sa_index_p3[19:0] enc_egr_axis_clk O PortIF Egress Encryption SA Index:

This signal represents the Security Association (SA) Index for the packet that starts on segment 6 or 7. This signal is valid in all crypto modes. This input is only valid during the start of packet.

enc_egr_prtif_crypto_spare_out_p0[31:0] enc_egr_axis_clk O PortIF Egress Encryption Spare Outputs: These outputs reflect sideband signals carried through the encryption pipeline for the packet that starts on segment 0 or 1. The sideband signals are provided through spare_in input ports and sampled during start of packet at the ingress. These outputs are valid only during the start pf packet. This signal is valid for all crypto modes.
enc_egr_prtif_crypto_spare_out_p1[31:0] enc_egr_axis_clk O PortIF Egress Encryption Spare Outputs: These outputs reflect sideband signals carried through the encryption pipeline for the packet that starts on segment 2 or 3. See description for enc_egr_prtif_crypto_spare_out_p0 for more details.
enc_egr_prtif_crypto_spare_out_p2[31:0] enc_egr_axis_clk O PortIF Egress Encryption Spare Outputs: These outputs reflect sideband signals carried through the encryption pipeline for the packet that starts on segment 5 or 4. See description for enc_egr_prtif_crypto_spare_out_p0 for more details.
enc_egr_prtif_crypto_spare_out_p3[31:0] enc_egr_axis_clk O PortIF Egress Encryption Spare Outputs: These outputs reflect sideband signals carried through the encryption pipeline for the packet that starts on segment 6 or 7. See description for enc_egr_prtif_crypto_spare_out_p0 for more details.
enc_egr_prtif_crypto_zlen_p0 enc_egr_axis_clk O PortIF Egress Encryption Zero-length Payload Indicator:

The value of this signal should be ignored.

enc_egr_prtif_crypto_zlen_p1 enc_egr_axis_clk O PortIF Egress Encryption Zero-length Payload Indicator:

The value of this signal should be ignored.

enc_egr_prtif_crypto_zlen_p2 enc_egr_axis_clk O PortIF Egress Encryption Zero-length Payload Indicator:

The value of this signal should be ignored.

enc_egr_prtif_crypto_zlen_p3 enc_egr_axis_clk O PortIF Egress Encryption Zero-length Payload Indicator:

The value of this signal should be ignored.

enc_egr_prtif_macsec_mtu_check_failure_p0 enc_egr_axis_clk O PortIF Egress Encryption MACsec MTU Check Failure Indication:

This signal is set High to indicate that the Maximum Transfer Unit check failed for the packet which ends on segment 0 or 1. The encryption block flags packets that exceed the MTU (which is defined by c0_cfg_tx_max_frm_len through c39_cfg_tx_max_frm_len in C0_CTL_TX_GENERAL_REG through C39_CTL_TX_GENERAL_REG registers for each port/channel) after addition of the SecTAG and ICV when MTU check is enabled. This output is valid during the end of a packet with no pass-through errors that is, during the end of packet when no AXI4-Stream error is signaled on the user interface. This signal is only valid for MACsec mode.

enc_egr_prtif_macsec_mtu_check_failure_p1 enc_egr_axis_clk O PortIF Egress Encryption MACsec MTU Check Failure Indication:

This signal is set High to indicate that the Maximum Transfer Unit check failed for the packet which ends on segment 2 or 3. For more details, see description for enc_egr_prtif_macsec_mtu_check_failure_p0.

enc_egr_prtif_macsec_mtu_check_failure_p2 enc_egr_axis_clk O PortIF Egress Encryption MACsec MTU Check Failure Indication:

This signal is set High to indicate that the Maximum Transfer Unit check failed for the packet which ends on segment 4 or 5. For more details, see description for enc_egr_prtif_macsec_mtu_check_failure_p0.

enc_egr_prtif_macsec_mtu_check_failure_p3 enc_egr_axis_clk O PortIF Egress Encryption MACsec MTU Check Failure Indication:

This signal is set High to indicate that the Maximum Transfer Unit check failed for the packet which ends on segment 6 or 7. For more details, see description for enc_egr_prtif_macsec_mtu_check_failure_p0.

stat_rsvd_out_tx_top[119:0] enc_egr_axis_clk O Bit [65]: This signal is the buffer overflow signal in Channelized mode. If you do not respond to skip requests from the core in Channelized mode, the internal per-channel buffer may overflow. In that case, this signal is asserted during an active cycle on the encryption egress side aligned with enc_egr_axis_tid[5:0]. When an overflow occurs in Channelized mode, the corresponding channel must be reset/flushed before being used again.

Other bits are reserved. This signal must be ignored in Fixed Port mode.

  1. <N> is the port number 0 to 3 and <M> is the segment number 0 to 7.