Example Design Hierarchy - 1.0 English

Versal Adaptive SoC Integrated 400G High Speed Channelized Cryptography Engine Subsystem Product Guide (PG372)

Document ID
PG372
Release Date
2024-01-30
Version
1.0 English

The following figure shows the HSC example design.

Figure 1. Example Design Block Diagram (Simulation)

Figure 2. Example Design Block Diagram (Implementation)