Fixed Port AXI4-Stream User Interface - 1.0 English

Versal Adaptive SoC Integrated 400G High Speed Channelized Cryptography Engine Subsystem Product Guide (PG372)

Document ID
PG372
Release Date
2024-01-30
Version
1.0 English
The datapath interface to and from the HSC Subsystem is a high performance AXI4-Stream interface. On both encryption and decryption paths, data is presented to and collected from an AXI4-Stream interface.

Each AXI4-Stream interface operates in segmented mode to ensure high throughput over a range of traffic profiles. On the encryption path, the user data enters on the encryption ingress interface and leaves on the encryption egress interface. Similarly, on the decryption path, the user data enters on the decryption ingress interface and leaves on the decryption egress interface.

The following sections describe the AXI4-Stream signals and the signals to be used for the supported data rates. Each AXI4-Stream interface contains the typical signals along with a set of per-port signals (easily identified by the "_prtif_" in their name). The per-port signals contain supplementary information which is sampled/driven in the same cycle as the corresponding AXI4-Stream signals.

Note: Some of the signals (described in the tables below) pertain to the Channelized Mode of operation. Refer to Channelized Mode AXI4-Stream User Interface which describes this in more detail. In all cases, unused input signals (including those inputs associated with unused or disabled modes) should be driven to 0.

The HSC Subsystem can be dynamically reconfigured during runtime to support a user-selected mode of operation (for example, changing the data rate of a given port). In this case, the user logic must be careful to properly drive the correct signals depending on the mode of operation.

Note: In the tables, <N> is the port number 0-3 and <M> is the segment number 0 to 7.