Similar to the encryption ingress interface, the width of the encryption egress AXI4-Stream interface for a given port in Fixed Port Mode depends on the configured rate as presented in Table 1.
When Port <N> (N=0, 1, 2, 3) is configured in Fixed Port mode, the data is transferred from
the HSC Subsystem to the user on positive edge of the
enc_egr_axis_clk signal when the corresponding
enc_egr_axis_tvalid_<N> signal for that port is asserted. Note
that the HSC Subsystem does not support backpressure on its egress
interfaces, hence no tready is present for the egress interface. The
user logic must absorb the data from the HSC Subsystem whenever
enc_egr_axis_tvalid_<N> is asserted.
enc_egr_axis_tvalid_<N> is asserted, enc_egr_axis_ena<M> qualifies the segment data (enc_egr_axis_tdata<M>) and all tuser output signals for Segment <M> (Segment
<M> represents all segments associated with Port <N> is a given mode).In 400G Fixed Port mode, the upper or lower four segments of the egress AXI4-Stream bus may be idle during an active cycle. Note that in this case, the other four segments which contain valid data may also start with idle segments followed by SOP.
The maximum number of SOPs and EOPs that can appear in the same cycle on the egress AXI4-Stream depends on the configured mode:
- In 100G Fixed Port mode, the core has a maximum of one SOP and one EOP in a given cycle.
- In 200G Fixed Port mode, there is a maximum of one SOP and two EOPs in a given cycle.
- In 400G Fixed Port mode, the HSC Subsystem can send out a maximum of two SOPs and three EOPs in any given cycle.