HSC IP Example Design Creation, Simulation and Device Image Generation - 1.0 English

Versal Adaptive SoC Integrated 400G High Speed Channelized Cryptography Engine Subsystem Product Guide (PG372)
Document ID
PG372
Release Date
2024-01-30
Version
1.0 English
  1. Open the Vivado Design Suite in GUI mode.
  2. Select File > Project > New.
  3. Create a new project with any Versal device xcvp1202-vsva2785-2LP-e-S (for VPK120 Board).
    Note: For 2032.2, both xcvp1202-vsva2785-2lp-e-s-es1 and xcvp1202-vsva2785-2lp-e-s devices are present in the build.


  4. Search for and select the HSC IP from the IP catalog.

  5. Customize the IP.

  6. After customizing, the Generate Output Products window appears. Click Generate.

  7. After generating the IP, right-click hsc_0 from the Design Sources and select Open IP.

  8. Specify the path where you want to save the example design, and click OK.

    The Vivado project opens with example design ‘HSC_0_ex’.



  9. Right-click Simulation and select Simulation settings. Select the Target simulator as required. The Vivado simulator is shown in the following figure.

  10. After the simulation setup is done, click Run Behavior Simulation. Observe the simulation.

    The example design simulation starts at the prints the statistics.

    Once the simulation is successful, you can generate the bitstream for board validation.

  11. Write the constraints in the XDC file with respect to the selected device/board.
  12. Click Generate Device Image. It starts from synthesis and implementation, then the image (.pdi) is generated.
  13. After generating the image, export the hardware for application creation by navigating to File > Export > Export Hardware.

  14. To generate the .xsa file, navigate to Export Hardware > Next > Include Device Image > Next > file_name > Finish.