Debugging - 2.1 English

AXI Register Slice LogiCORE IP Product Guide (PG373)

Document ID
PG373
Release Date
2020-12-04
Version
2.1 English
Revision

This appendix includes details about resources available on the Xilinx® Support website and debugging tools.

If the IP requires a license key, the key must be verified. The Vivado® design tools have several license checkpoints for gating licensed IP through the flow. If the license check succeeds, the IP can continue generation. Otherwise, generation halts with an error. License checkpoints are enforced by the following tools:

  • Vivado Synthesis
  • Vivado Implementation
  • write_bitstream (Tcl command)
Important: IP license level is ignored at checkpoints. The test confirms a valid license exists. It does not check IP license level.