Operation - 1.0 English

The following figure shows a simple decoupler that decouples a single signal.

When the decouple input is 0, the rp_A input is passed unchanged to the s_A output.
When the decouple input is 1, the rp_A input is decoupled from the s_A output, and s_A is driven to a constant value.

Figure 1. Simple DFX Decoupler Core

Configuring a DFX Decoupler core to decouple the static from a Reconfigurable Partition can be time consuming when done one signal at a time, so the DFX Decoupler core has been designed to be interface aware.

According to the Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994),

“An interface is a grouping of signals that share a common function. An AXI4-Lite master, for example, contains a large number of individual signals plus multiple buses, which are all required to make a connection. If each signal or bus is visible individually on an IP symbol, the symbol will be visually very complex. By grouping these signals and buses into an interface, the following advantages can be realized. First, a single connection in IP integrator (or Tcl command) will make a master to slave connection. Next, the graphical representation of this connection will be simple - a single connection. Finally, Design Rule Checks (DRCs) that are aware of the specific interface can be run to assure that all the required signals are connected properly.”

In the simplest case, an interface can contain one signal, such as CLOCK, DATA, or RESET.

Tip: To view the interfaces available in the Vivado® Design Suite, select Window > IP Catalog, and click the Interfaces tab.

By specifying a defined interface, the DFX Decoupler core can create the appropriate code for all signals in the interface. For example, the following figure shows a full decoupler when the AXI4-Stream interface is selected.

Figure 2. Fully Decoupled AXI4-Stream Interface

The decoupling behavior for each decoupled interface can be customized. With the exception of the AXI4 interfaces listed in the following table, all signals in each interface are present and decoupled to 0. Decoupling all signals in an interface can waste resources, so the common interfaces in the following table have different defaults.

Table 1. AXI4 Interfaces Decoupling Exceptions
Interface	Signal Decoupling Behavior
AXI4-Stream	Only the TVALID and TREADY signals are decoupled. TID, TDEST, TSTRB, TUSER, and TKEEP signals are not present by default.
AXI4-MM	Only the channel VALID and READY signals are decoupled. The channel USER, LAST, ID, LOCK, CACHE, PROT, REGION, and QoS signals are not present by default. Additionally, when the PROTOCOL parameter is set to: AXI4LITE – The following signals are disabled: AWLEN, ARLEN, AWSIZE, ARSIZE, AWBURST, ARBURST, AWLOCK, ARLOCK, AWCACHE, ARCACHE, WLAST, and RLAST. AXI3 –The following signals are fixed to 4 bits wide: AWLEN and ARLEN. AXI4 – The following signals are fixed to 8 bits wide: AWLEN and ARLEN. None –No restrictions are applied.

The following figure shows the default implementation for an AXI4-Stream decoupler.

Figure 3. Default Decoupling for AXI4-Stream Interfaces

The examples given so far have shown a decoupler that decouples a master interface on a Reconfigurable Partition. A master interface is one which initiates transactions, and a slave interface is one that responds to transactions. In the case of an interface with one signal, the master interface is the one that drives the signal, and the slave interface is the one that receives the signal. The DFX Decoupler core can also decouple slave interfaces on a Reconfigurable Partition, as shown in the following figure.

Figure 4. Decoupling a Master and a Slave AXI4-Stream Interface

The previous figure also shows that one instance of a decoupler can decouple multiple Reconfigurable Partition interfaces. These can be of any interface type.