Clocking - 1.0 English

Performance AXI Traffic Generator LogiCORE IP Product Guide (PG381)

Document ID
PG381
Release Date
2023-10-18
Version
1.0 English

The Simulation Clock and Reset Generator block is used to generate the AXI clocks for different TGs and a pclk signal for the Simulation Trigger.

You can run Multiple TGs at the same or at a different frequency. A Simulation Clock and Reset Generator generates multiple clock frequencies during simulation. Generated clocks can be used to run TGs at independent AXI clock frequencies.

Figure 1. Clock Architecture Block Diagram