Delays supported by the TG - 1.0 English

Performance AXI Traffic Generator LogiCORE IP Product Guide (PG381)

Document ID
PG381
Release Date
2023-10-18
Version
1.0 English
Inter transfer delay/inter beat delay
Represents the delay in terms of input CLK ticks between the data transfers (that is to say, data beats) in a transaction. In AXI3/AXI4, this delay is called inter beat delay. In AXI4-Stream, this delay is called inter transfer delay. For the Non-Synthesizable TG, the delay is supported up to a 32-bit value.
Inter packet delay/start delay
Represents the delay in terms of input CLK ticks between transactions. In AXI3/AXI4 this delay is called start delay. In AXI4-Stream this delay is called inter packet delay. For the Non-Synthesizable TG, the delay is supported up to a 32-bit value.