This section includes information about using Xilinx® tools to customize and generate the core in the Vivado® Design Suite.
If you are customizing and generating
the core in the
Vivado IP integrator, see
the
Vivado Design Suite User Guide: Designing
IP Subsystems using IP Integrator (UG994) for
detailed information. IP integrator might auto-compute certain
configuration values when validating or generating the design. To
check whether the values do change, see the description of the
parameter in this chapter. To view the parameter value, run the
validate_bd_design command in the Tcl
console.
For details, see the Vivado Design Suite User Guide: Designing with IP (UG896) and the Vivado Design Suite User Guide: Getting Started (UG910).
Figures in this chapter are illustrations of the Vivado IDE. The layout depicted here might vary from the current version.
The following section defines the possible customization options in the XPM CDC Generator core Vivado IDE.