Clocking - 2.0 English

Lossless Compression LogiCORE IP Product Guide (PG387)

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2.0 English

This core runs on a single clock through the port named s_aclk. The core is tested to meet timing at 250 MHz when measured at the IP level using the Alveo-U200 device. Meeting the same frequency when the core is inserted into a system is subject to the system design, device congestion, and the usage of timing best practices, and other factors.