Figure 1. ADC DAC IF Basic Configuration Tab
- Interface Speed
- This parameter specifies data rate of TX or RX data lane.
- Data Bus Direction
- This parameter can be configured as TX, RX or TX+RX. Select the TX option if all the pins in the design are TX pins. Select the RX option if all the pins in the design are RX pins. Select RX+TX if the design has both RX and TX pins.
- Data Bus IO Type
- This can be chosen as "Single Ended" or "Differential" based on the IO type for the pins.
- Application Datawidth
- This Datawidth can be configured as 12,14, or 16.
- Reference Clock Type
- This can be configured as "Frame clock" or "Bit clock". When this parameter is chosen as "Bit clock", the reference clock frequency will be same as the interface speed. When this parameter is chosen as "Frame clock", the reference clock frequency will be "Bit clock" divided by "Reference clock divider value".
- IP Clocking Summary
- This summary table tabulates the clock frequencies of "Reference clock",
"XPLL Clock" and "
app_tx_clk/app_rx_clk".